| Feature |
Freemium |
Basic |
Full |
| HercuLeS GUI |
Y |
Y |
Y |
| Automatic RTL VHDL code generation |
Y |
Y |
Y |
| Automatic testbench generation |
Y |
Y |
Y |
| Portable vendor-independent VHDL code generation |
Y |
Y |
Y |
| Automatic user-defined IP integration |
Y |
Y |
Y |
| Graph-based synthesis engine |
Y |
Y |
Y |
| Generation of compiler graphs (call graphs,
control flow graphs, control-data flow graphs) |
Y |
Y |
Y |
| C frontend |
Y |
Y |
Y |
| GHDL support |
Y |
Y |
Y |
| Mentor Modelsim support |
Y |
Y |
Y |
| Email support |
Y |
Y |
Y |
| Phone and Skype support |
Y |
Y |
Y |
| Live/on-site consultancy support |
Y |
Y |
Y |
| Parallel operation scheduling |
|
Y |
Y |
| Automatic block RAM inference |
|
Y |
Y |
| Constant multiplication optimization |
|
Y |
Y |
| Constant division optimization |
|
Y |
Y |
| VHDL-2008 floating-point arithmetic support |
|
Y |
Y |
| C verification backend |
|
Y |
Y |
| Additional complete examples |
|
Y |
Y |
| Xilinx Isim support |
|
Y |
Y |
| VHDL-2008 fixed-point arithmetic support |
|
|
Y |
| Register optimization |
|
|
Y |
| Operation scheduling improvements |
|
|
Y |
| Array flattening optimizations |
|
|
Y |
| C source code optimizer |
|
|
Y |
| Active-HDL support |
|
|
Y |