Teaching in academia

The main objective of this course is to familiarize the student with the VHDL hardware description language and its use in digital circuit design. At the end of the course the student should:
(a) be able to design digital circuits in VHDL,
(b) be aware of techniques for designing digital system components such as control units, datapaths and memory resources, and
(c) to verify the proper functioning of synthesizable, synchronous, circuit descriptions in VHDL.

1. Introduction to the VHDL hardware description language.


2. Elements of the VHDL language such as entity, architecture, component, package, function, procedure, generate. Sequential and concurrent descriptions.


3. Advanced features of VHDL.


4. Parameterized designs.


5. Coding guidelines for logic synthesis.


6. Testbenches.


7. Finite-state machines.


8. Non-programmable processors and the finite-state machine with datapath (FSMD).


9. Parameterized designs.


10. Describing programmable processors in VHDL.


11. Advanced design techniques.

Course agenda (pdf)

Suggested bibliography on VHDL (pdf)

Lecture notes and corresponding code packs

• Lecture 01: Introduction to VHDL [45 slides] (1-up/pdf, 4-up/pdf, zipfile with source code)


• Lecture 02: Sequential and concurrent code constructs [39 slides] (1-up/pdf, 4-up/pdf, zipfile with source code)


• Lecture 03: Advanced features of VHDL [39 slides] (1-up/pdf, 4-up/pdf, zipfile with source code)


• Lecture 04: Coding parameterized designs [33 slides] (1-up/pdf, 4-up/pdf, zipfile with source code)


• Lecture 05: Writing code for logic synthesis [41 slides] (1-up/pdf, 4-up/pdf, zipfile with source code)


• Lecture 06: Testbenches [36 slides] (1-up/pdf, 4-up/pdf)


• Lecture 07: Finite-state machines [31 slides] (1-up/pdf, 4-up/pdf, zipfile with source code)


• Lecture 08: Sample lab assignment [32 slides] (pdf, 4-up/pdf, zipfile with source code)


• Lecture 09: Non-programmable processors [35 slides] (1-up/pdf, 4-up/pdf, zipfile with source code, GCD example)


• Lecture 10: Course overview [70 slides] (1-up/pdf, 4-up/pdf,)

• P1: Binary logarithm computation (pdf)


• P2: Computing the minimum number of coins/banknotes for an amount (pdf)


• P3: Processor for graph manipulation (pdf)


• P4: Float-to-half and half-to-float conversions (pdf)


• P5: Integer square root approximation circuit (pdf)


• P6: Raster-scan and row-prime address generator (pdf)


• P7: Spiral address generator (pdf)


• P8: Turtle graphics processor (pdf)

• Spring 2009 exams (pdf)


• Fall 2009 exams (pdf)


• Winter 2010 exams (pdf)